Flip-flops and Counters
S-R Flip Flop
Learning Objectives:
- Understand the Flip-Flop principle.
- Know the three basic Flip-Flops (RS, D, JK)
- Able to analyze timing diagrams for S-R Flip Flop.
- The S-R flip flop is basic flip flop among all flip flops. All other flip-flops are developed after S-R flip flops.
- An S-R flip flop has five terminals: Set (S), Reset(R), output (Q), Inverted output (Q') and Clock.
Solved Example: 9965-01
The one input RS flip flop is the ______ flip flop. (IPRC (ISRO) Tech Asst (Electronics): Dec 2016)
A. T
B. D
C. R
D. Latch
Correct Answer: B
Solved Example: 9965-02
The S-R latch is an example of: (DFCCIL Junior Executive S&T 2018)
A. Combinational circuit
B. Synchronous sequential circuit
C. One-bit memory element
D. One-clock delay element
Correct Answer: C
Solved Example: 9965-03
For SR flip-flop with NOR gates, the undefined state is: (ISRO (VSSC) Technician Electrician Feb 2019)
A. S = 0, R = 0
B. S = 0, R = 1
C. S = 1, R = 1
D. S = 1, R = 0
Correct Answer: C
Solved Example: 9965-04
The correct combination of characteristic equation Qn+1 of S-R flipflop and J-K flipflop respectively is: (UGC NET Paper II: Electronic Science June 2019)
A. $Q_nR + \bar{S} \mathrm{\ and\ }JQ_n + \bar{K}Q_n$
B. $Q_nR + S \mathrm{\ and\ } \bar{J}Q_n + \bar{K}Q_n$
C. $Q_n\bar{R} + S \mathrm{\ and\ }JQ_n + \bar{K}\bar{Q_n}$
D. $Q_n\bar{R} + S \mathrm{\ and\ }J\bar{Q_n}+ \bar{K}Q_n$
Correct Answer: D
Solved Example: 9965-05
The present state of the output of an SR flip flop is HIGH. If both its inputs become LOW, what would be the new state of the output? (ALP CBT 2 Electronic Mechanic Jan 2019 Shift II)
A. Unpredictable
B. LOW
C. Toggles
D. HIGH
Correct Answer: D
Solved Example: 9965-06
How many flip-flops are required to build a binary counter circuit to count from 0 to 1023? (UKPSC JE Electrical 2013 Nov 2015)
A. 1
B. 6
C. 10
D. 23
Correct Answer: C
Solved Example: 9965-07
What is one disadvantage of an S-R flip-flop? (VSSC (ISRO) Technician B (Electronic Mechanic) Sept 2016)
A. It has no Enable input
B. It has a RACE condition
C. It has no clock input
D. It has only single output
Correct Answer: B
J-K Flip Flop
- The J-K flip flop is operational similar to the S-R flip flop
- The J-K flip flop is clock driven like the clocked S-R flip flop
- The difference is that the J-K flip flop will retain its output status when two lows are present at its inputs. Also, when both inputs are high, the outputs will toggle on and off.
Solved Example: 9966-01
When two asynchronous active low inputs PRESET and CLEAR are: (DFCCIL Executive S&T 2018)
A. 0
B. Undefined
C. Previous state
D. 1
Correct Answer: B
Solved Example: 9966-02
In a J-K flip flop, when J = 1 and K = 1 then it will be considered as: (DFCCIL Executive S&T 2016)
A. Set condition
B. Reset condition
C. No change
D. Toggle condition
Correct Answer: D
Solved Example: 9966-03
If a JK FF toggles more than once during one clock cycle, it is called_______(ALP CBT 2 Electronic Mechanic Jan 2019 Shift II)
A. Bouncing
B. Racing
C. Pinging
D. Spiking
Correct Answer: B
Solved Example: 9966-04
A feature that distinguishes the JK flip flop from the SR flip flop is the: (TANGEDCO AE EE 2015)
A. Toggle condition
B. Preset input
C. Type of clock
D. Clear input
Correct Answer: A
D Flip-Flop
- A D flip flop is also known as 'Data" or "Delay" flip flop.
- It is a negative edge triggered flip flop.
- D flip flop never has an unknown state, unlike the R-S and J-K flip flop.
Solved Example: 9967-01
D flip flop can be made from a J-K flip flop by making: (VIZAG MT Electrical: 2015)
A. J = K
B. J = K = 1
C. J = 0, K = 1
D. J = $\bar{K}$
Correct Answer: D
Solved Example: 9967-02
Which of the following logic circuits does not have no-change condition? (ISRO Scientist ECE: 2020)
A. D-FF
B. T-FF
C. JK-FF
D. SR-Latch
Correct Answer: A
Solved Example: 9967-03
In a D flip flop the output state $Q_{N+1}$ is related with D input in what way?
A. $Q_{N+1}$ is same as D
B. $Q_{N+1}$ is complement of D
C. $Q_{N+1}$ is independent of D
D. $Q_{N+1}$ is dependent of D
Correct Answer: A
Solved Example: 9967-04
Which flip-flop is used to make all types of shift register? (NIELIT Scientific Assistant A Official Paper 2020)
A. J-K flip-flop
B. D flip-flop
C. T flip-flop
D. All of the above
Correct Answer: B
Solved Example: 9967-05
Which of the following is correct for a gated D- type flip flop? (ESE Electrical 2013 Paper II)
A. The output is either SET or RESET as soon as the D input goes High or Low
B. The output complement follows the input when enabled
C. Only one of the inputs can be HIGH at a time
D. The output toggles if one of the inputs is held HIGH
Correct Answer: A